1. Field of the Invention
The present application relates generally to testing electronic circuits. More specifically, the present application relates to a computer implemented method, apparatus, and computer usable code for uniform power and thermal distribution across processor cores at burn-in.
2. Description of the Related Art
A multi-core microprocessor, referred to hereinafter as a “multiprocessor”, is an integrated circuit (IC) having two or more independent processor cores. A processor core is an independent processor or computational unit capable of executing threads or other processes independently of the other processor core(s). The processor cores in a multiprocessor are typically plugged into a single processor socket, and share the same platform interface which connects each core to memory, input/output, and storage resources. This architecture permits enhanced performance, reduced power consumption, and simultaneous execution of multiple independent tasks or threads.
A multiprocessor may be considered to be functional for carrying out an intended purpose even if some functional units within the multiprocessor contain defects. For example, the first-generation Cell Broadband Engine™ (BE) processor, which is a heterogeneous, multi-core processor chip, is comprised of a single primary 64-bit Power PC® processor core (PPC) using a reduced instruction set computer (RISC) and eight synergistic processor cores (SPCs) using a single instruction multiple data (SIMD) instruction set. A heterogeneous multiprocessor has at least two cores that execute different instruction sets, respectively. On the other hand, a homogeneous multiprocessor has multiple cores that all use the same instruction set.
The Power PC® processor core is a general purpose central processing unit or primary processor. The synergistic processor cores are independent sub-processors capable of executing processes independently from the other synergistic processor cores. This modular chip is designed to operate without requiring all of the synergistic processor cores to function correctly.
If a defect is detected in a single functional unit of a multiprocessor, such as a synergistic processor core, the defective synergistic processor core can be disabled and the multiprocessor can still be used with the remaining functional unit(s). A multiprocessor in which one or more processing units are defective and one or more processing units remain functional is referred to herein as a “partial good” chip. As used herein, a processing unit is a processor core on a multiprocessor chip that performs processing functions. Examples of a processing unit include a primary processor, such as Power PC® processor core, or a sub-processor, such as a synergistic processor core.
Processor chips tend to experience a high rate of chip failure during the initial hours or days of the processor chip's operational life. This initially high fail rate drops off dramatically beyond the early mortality phase. This type of fail rate is referred to as a “bath-tub” fail rate. During the manufacture process of a processor chip, a burn-in test is generally performed at the factory in order to detect processor chips that are likely to experience a premature chip failure. The burn-in test simulates the first hours or days of a processor chip's operation by running a processor at a given voltage and/or temperature in order to accelerate the occurrence of early operational life failures. Thus, processor chips containing defects that would result in a premature failure of one or more processor cores in the multiprocessor can be identified.
A burn-in test accelerates early fails by operating the processor chip for a period of time at a particular voltage and/or temperature to ensure that all components are working properly before being released for sale. However, multiprocessors frequently require separate voltage planes for each processor core in order to optimize performance. In other words, each processing unit within a multiprocessor has different power requirements. A multiprocessor with a greater number of processor cores will require a greater number of voltage planes. A voltage plane refers to a voltage pin and circuitry that delivers power to a particular processor core.
An architect generally must add additional voltage pins to a multiprocessor as additional processor cores are added, in order to maintain separate voltage planes for each processor core. The additional voltage planes increase the complexity of the wiring required for each part of the chip. In addition, adding additional voltage planes can be expensive and cost prohibitive.
In the alternative, an architect can simply use one main voltage plane, such as a single pin, to deliver voltage to the multiprocessor. This option is less expensive. However, performance of the multiprocessor processor cores is sub-optimized because different processor cores within a single multiprocessor chip may require a different voltage from the main voltage plane in order to perform at optimum speed.